A wide tuning-range ADFLL for mW-SoCs with dithering-enhanced accuracy in 65 nm CMOS.

David E. Bellasi Philipp Schönle Qiuting Huang Luca Benini

Published in: ISCAS (2017)

Keyphrases

wide range
power consumption
high accuracy
power supply
tuning parameters
hd video
feature selection
computational complexity
control system
computational cost
low cost
range data
analog vlsi