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Self-Adaptive System for Addressing Permanent Errors in On-Chip Interconnects.
Teijo Lehtonen
David Wolpert
Pasi Liljeberg
Juha Plosila
Paul Ampadu
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2010)
Keyphrases
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power dissipation
cmos technology
high speed
low cost
input output
neural network
high density
real time
low power
programmable logic
power consumption
lower cost
database systems
segmentation errors
vlsi implementation
evolvable hardware
chip design