When reconfigurable architecture meets network-on-chip.

Rodrigo Soares Ivan Saraiva Silva Arnaldo Azevedo

Published in: SBCCI (2004)

Keyphrases

reconfigurable architecture
network on chip
routing algorithm
systolic array
network simulator
multi processor
data transfer
power dissipation
data flow
wireless sensor networks
shortest path
pattern recognition
distributed systems
ad hoc networks
mobile ad hoc networks
interconnection networks