An out-of-order superscalar processor on FPGA: The ReOrder Buffer design.

Mathieu Rosiere Jean Lou Desbarbieux Nathalie Drach Franck Wajsbürt

Published in: DATE (2012)

Keyphrases

single chip
computer architecture
case study
hardware design
real time
user interface
low cost
high speed
gate array
parallel processing
distributed memory
hardware architecture
highly parallel
low power consumption
xilinx virtex
functional verification