On digit-recurrence division implementations for field programmable gate arrays.
Marianne E. LouieMilos D. ErcegovacPublished in: IEEE Symposium on Computer Arithmetic (1993)
Keyphrases
- field programmable gate array
- software implementation
- hardware implementation
- general purpose processors
- embedded systems
- application specific integrated circuits
- programmable logic
- fpga technology
- parallel computing
- efficient implementation
- computing systems
- hardware architecture
- image processing algorithms
- hardware design
- parallel architectures
- digital signal processors
- digital signal processing
- fpga implementation
- hardware software co design
- massively parallel
- host computer
- high end
- hw sw
- message passing interface
- neural network
- high performance computing
- hardware and software
- parallel processing
- signal processing