Flexible reconfigurable multiplier blocks suitable for enhancing the architecture of FPGAs.
Simon D. HaynesAntonio B. FerrariPeter Y. K. CheungPublished in: CICC (1999)
Keyphrases
- hardware implementation
- field programmable gate array
- reconfigurable hardware
- hardware architecture
- dynamic reconfiguration
- fpga technology
- fpga implementation
- hardware design
- signal processing
- hardware software
- efficient implementation
- software architecture
- smart camera
- low cost
- general purpose
- neural network
- image processing algorithms
- parallel architecture
- systolic array
- network architecture
- design methodology
- embedded systems
- lightweight
- general purpose processors
- real time
- fractal image coding
- information presentation
- variable size
- software systems
- data sets