Practical use of sequential ATPG for model checking: going the extra mile does pay off.
Michael S. HsiaoJawahar JainPublished in: HLDVT (2001)
Keyphrases
- model checking
- temporal logic
- formal verification
- finite state
- model checker
- formal specification
- automated verification
- symbolic model checking
- computation tree logic
- temporal properties
- partial order reduction
- reachability analysis
- transition systems
- process algebra
- finite state machines
- verification method
- bounded model checking
- pspace complete
- epistemic logic
- timed automata
- asynchronous circuits
- formal methods
- concurrent systems
- linear temporal logic
- alternating time temporal logic