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Dual-VT 4kb sub-VT memories with <1 pW/bit leakage in 65 nm CMOS.

Oskar AnderssonBabak MohammadiPascal MeinerzhagenAndreas BurgJoachim Neves Rodrigues
Published in: ESSCIRC (2013)
Keyphrases
  • low cost
  • random access memory
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  • cmos technology
  • low voltage
  • associative memory
  • database
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  • low power
  • metal oxide semiconductor
  • nm technology