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Low-Latency Digit-Serial Systolic Double Basis Multiplier over $\mbi GF{(2^m})$ Using Subquadratic Toeplitz Matrix-Vector Product Approach.

Jeng-Shyang PanReza AzarderakhshMehran Mozaffari KermaniChiou-Yng LeeWen-Yo LeeChe Wun ChiouJim-Min Lin
Published in: IEEE Trans. Computers (2014)
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