MIST: monitor generation from informal specifications for firmware verification.
Samuele GerminianiMoreno BragaglioGraziano PravadelliPublished in: VLSI-SOC (2020)
Keyphrases
- automated verification
- model checking
- concurrent systems
- asynchronous circuits
- formal verification
- bounded model checking
- model checker
- monitoring system
- operating system
- artificial intelligence
- real time
- generation process
- delay insensitive
- power consumption
- formal specification
- formal methods
- social networks
- signature verification
- computer systems
- data mining
- neural network