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A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.
Tailong Xu
Feng Xue
Zhikuang Cai
Xinning Liu
Shuo Meng
Published in:
ASICON (2017)
Keyphrases
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phase locked loop
power consumption
image analysis
databases
image processing
digital content
integrated circuit
duty cycle