An Efficient Architecture of In-Loop Filters for Multicore Scalable HEVC Hardware Decoders.
HyunMi KimJeongGil KoSeongmo ParkPublished in: IEEE Trans. Multim. (2018)
Keyphrases
- hardware architecture
- memory management
- real time
- hardware implementation
- software implementation
- vlsi implementation
- computing power
- hardware design
- hardware software
- computer systems
- high end
- dedicated hardware
- operating system
- memory efficient
- parallel architecture
- low cost
- computing systems
- vlsi architecture
- shared memory
- multi core processors
- signal processing
- edge detection
- commodity hardware
- pipeline architecture
- low complexity
- cloud computing
- memory hierarchy
- reconfigurable hardware
- abstraction layer
- software defined radio