Login / Signup
The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits.
M. Eisele
Jörg Berthold
Doris Schmitt-Landsiedel
R. Mahnkopf
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (1997)
Keyphrases
</>
digital circuits
design considerations
low voltage
design process
functional decomposition
finite state machines
circuit design
power management
mixed signal
e learning
search space