Minimum Parallel Binary Adders with NOR (NAND) Gates.

Hung Chi Lai Saburo Muroga

Published in: IEEE Trans. Computers (1979)

Keyphrases

bit parallel
parallel processing
artificial intelligence
shared memory
parallel implementation
binary data
programmable logic
multiple valued
database
data sets
parallel computing
massively parallel
computer architecture
parallel computation
parallel architectures
distributed memory machines