4-Valued BiCMOS Circuits for the Transmission System of a Massively Parallel Architecture.

Daniel Etiemble Christophe Chanussot Vincent Néri

Published in: ISMVL (1990)

Keyphrases

mixed signal
data transmission
high speed
logic circuits
low power
data sets
website
vlsi circuits
database
real time
mobile devices
end to end
multi channel
analog circuits
delay insensitive
analog vlsi