Hardware design of LIF with Latency neuron model with memristive STDP synapses.
Simone AcciaritoGian Carlo CardarilliAlessandro CristiniLuca Di NunzioRocco FazzolariGaurav Mani KhanalMarco ReGianluca SusiPublished in: CoRR (2018)
Keyphrases
- hardware design
- neuron model
- spiking neurons
- spiking neural networks
- feed forward
- hardware implementation
- biologically plausible
- hebbian learning
- fpga hardware
- feed forward neural networks
- neural network
- spike trains
- biologically inspired
- field programmable gate array
- artificial neural networks
- visual processing
- higher order
- real time