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C1C: A configurable, compiler-guided STT-RAM L1 cache.
Yong Li
Yaojun Zhang
Hai Li
Yiran Chen
Alex K. Jones
Published in:
ACM Trans. Archit. Code Optim. (2013)
Keyphrases
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main memory
memory access
programming language
prefetching
hit rate
data access
web caching
general purpose
query processing
software systems
distributed memory machines
b tree
flash memory
parallel programming
design considerations
back end
memory hierarchy
caching scheme
database management systems