A 9 bit, 1.12 ps Resolution 2.5 b/Stage Pipelined Time-to-Digital Converter in 65 nm CMOS Using Time-Register.
KwangSeok KimWonsik YuSeongHwan ChoPublished in: IEEE J. Solid State Circuits (2014)
Keyphrases
- analog to digital converter
- mixed signal
- image sensor
- cmos technology
- metal oxide semiconductor
- cmos image sensor
- low power
- low voltage
- nm technology
- circuit design
- high resolution
- dynamic range
- random access memory
- power consumption
- low resolution
- image processing
- data flow
- multi channel
- vlsi circuits
- relational databases