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Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA.
Safa Berrima
Yves Blaquière
Yvon Savaria
Published in:
IET Circuits Devices Syst. (2020)
Keyphrases
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detection method
high accuracy
high speed
computational complexity
preprocessing
clustering method
high precision
neural network
multiscale
pairwise
significant improvement
dynamic programming
computational cost
support vector machine
segmentation method