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A Dividerless PLL With Low Power and Low Reference Spur by Aperture-Phase Detector and Phase-to-Analog Converter.
Deyun Cai
Haipeng Fu
Junyan Ren
Wei Li
Ning Li
Hao Yu
Kiat Seng Yeo
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2013)
Keyphrases
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low power
low cost
high speed
power consumption
mixed signal
single phase
vlsi circuits
vlsi architecture
low power consumption
multi channel
data conversion
processing capabilities
high power
cmos technology
high resolution
low complexity
wireless sensor networks