A 8-Gb/s 0.256-pJ/b transceiver for 5-mm on-chip interconnects in 130-nm CMOS.
Xiangdong JiaGlenn E. R. CowanPublished in: ISCAS (2017)
Keyphrases
- cmos technology
- low power
- high speed
- ultra low power
- power dissipation
- clock frequency
- power consumption
- nm technology
- low voltage
- silicon on insulator
- parallel processing
- low cost
- rms error
- mixed signal
- image sensor
- single chip
- cmos image sensor
- phase locked loop
- low power consumption
- frequency response
- wireless systems
- digital signal processing
- digital camera
- wireless networks
- infrared
- wireless sensor networks