Login / Signup
Self-Checking and Fail-Safe LSIs by Intra-Chip Redundancy.
Nobuyasu Kanekawa
Makoto Nohmi
Yoshimichi Satoh
Hiroshi Satoh
Published in:
FTCS (1996)
Keyphrases
</>
high speed
low cost
analog vlsi
programmable logic
high density
physical design
redundancy reduction
single chip
consistency checking
low power
circuit design
high bandwidth
vlsi design
database
multiple description coding
multithreading
vlsi implementation
modular design
power consumption
real time