A 40-nm CMOS 7-b 32-GS/s SAR ADC With Background Channel Mismatch Calibration.
Dong-Shin JoBa-Ro-Saim SungMin-Jae SeoWoo-Cheol KimSeung-Tak RyuPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2020)
Keyphrases
- analog to digital converter
- high speed
- camera calibration
- silicon on insulator
- metal oxide semiconductor
- cmos technology
- synthetic aperture radar
- power consumption
- circuit design
- multi channel
- single chip
- low cost
- camera parameters
- analog vlsi
- communication channels
- cmos image sensor
- low power
- parameter estimation
- power supply
- sar images
- received signal
- antenna array
- focal plane
- image reconstruction
- nm technology