A high performance hardware architecture for portable, low-power retinal vessel segmentation.
Dimitris KoukounisChristos TtofisAgathoklis PapadopoulosTheocharis TheocharidesPublished in: Integr. (2014)
Keyphrases
- vessel segmentation
- hardware architecture
- low power
- retinal images
- blood vessels
- low power consumption
- signal processor
- power consumption
- low cost
- high speed
- field programmable gate array
- hardware implementation
- low contrast
- single chip
- hardware architectures
- vessel enhancement
- digital signal processing
- logic circuits
- associative memory
- region of interest
- cmos technology
- optic disc
- mixed signal
- region growing
- image segmentation
- signal processing
- magnetic resonance angiography
- parallel computing