FPGA Implementations of 3D-SIMD Processor Architecture for Deep Neural Networks Using Relative Indexed Compressed Sparse Filter Encoding Format and Stacked Filters Stationary Flow.
Yuechao GaoNianhong LiuSheng ZhangPublished in: CoRR (2018)
Keyphrases
- neural network
- parallel architecture
- software implementation
- single instruction multiple data
- xilinx virtex
- general purpose processors
- hardware architectures
- hardware implementation
- hardware architecture
- parallel processing
- single chip
- high speed
- processing elements
- systolic array
- field programmable gate array
- fpga device
- steerable filters
- filtering scheme
- image filters
- real time
- parallel implementation
- associative memory
- filter responses
- bilateral filter
- order statistics
- finite impulse response
- nonlinear filters
- hardware design
- morphological filters
- median filter
- non stationary
- bandpass
- low pass filter
- digital filters
- dedicated hardware
- parallel architectures
- massively parallel
- efficient implementation
- signal processing
- floating point unit
- optimal filter
- processor array
- high pass
- fpga implementation
- low power
- parallel processors
- digital signal
- low cost
- image processing algorithms
- filtering method
- level parallelism
- reconfigurable hardware
- spam filters
- instruction set
- linear filters
- correlation filters
- parallel computing
- functional units
- fpga technology
- filter outputs
- memory management
- noise reduction
- edge detection