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A novel low-voltage content-addressable-memory (CAM) cell with a fast tag-compare capability using partially depleted (PD) SOI CMOS dynamic-threshold (DTMOS) techniques.

S. C. LiuF. A. WuJames B. Kuo
Published in: IEEE J. Solid State Circuits (2001)
Keyphrases
  • low voltage
  • content addressable memory
  • high speed
  • cmos technology
  • low power
  • design considerations
  • power line
  • random access memory
  • power management
  • pattern recognition
  • low cost
  • markov random field