Application of genetic algorithm in computing the tradeoffs between power consumption versus delay in digital integrated circuit design.
Javier SosaJuan A. Montiel-NelsonSaeid NooshabadiPublished in: Microelectron. J. (2010)
Keyphrases
- power consumption
- integrated circuit
- power dissipation
- low power
- genetic algorithm
- power management
- low power consumption
- nm technology
- energy efficiency
- power saving
- power reduction
- design process
- energy saving
- cmos technology
- hardware description language
- built in self test
- metal oxide semiconductor
- design methodology
- wireless sensor networks