Cryogenic CMOS as an Enabler for Low Power Dynamic Logic.
Rakshith SaligramSuman DattaArijit RaychowdhuryPublished in: ISLPED (2023)
Keyphrases
- low power
- dynamic logic
- power consumption
- high speed
- low cost
- single chip
- cmos technology
- modal logic
- vlsi circuits
- reasoning about actions
- high power
- image sensor
- imperative programs
- wireless transmission
- ultra low power
- mixed signal
- digital signal processing
- nm technology
- vlsi architecture
- low power consumption
- power reduction
- delay insensitive
- power dissipation
- real time
- propositional dynamic logic
- cmos image sensor
- expert systems