Parallel LDPC Decoding on a Network-on-Chip Based Multiprocessor Platform.
Wen-Hsiang HuJun Ho BahnNader BagherzadehPublished in: SBAC-PAD (2009)
Keyphrases
- network on chip
- multi processor
- single processor
- distributed memory
- ldpc codes
- low density parity check
- packet switched
- decoding algorithm
- shared memory
- routing algorithm
- message passing
- network simulator
- interconnection networks
- parallel processors
- parallel computing
- parallel architectures
- parallel processing
- turbo codes
- channel coding
- parallel programming
- computer architecture
- parallel implementation
- parallel computers
- massively parallel
- low cost