Sign in
Error-Oblivious Sample Preparation With Digital Microfluidic Lab-on-Chip.
Sudip Poddar
Robert Wille
Hafizur Rahaman
Bhargab B. Bhattacharya
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2019)
Keyphrases
</>
circuit design
mixed signal
low cost
sample size
phase locked loop
cmos image sensor
error bounds
high density
error rate
vlsi implementation
training data
error estimates
error analysis
multi channel
high speed
neural network
dynamic range
digital media
single chip
error estimation
digital content
level parallelism