A low-power VLSI feature extractor for speech recognition.
Marco FeliciMichele BorgattiAlberto FerrariRoberto GuerrieriPublished in: ICASSP (1998)
Keyphrases
- speech recognition
- low power
- feature extractor
- single chip
- high speed
- vlsi circuits
- gate array
- vlsi architecture
- power consumption
- low cost
- power dissipation
- feature extraction
- hidden markov models
- mixed signal
- speech signal
- language model
- recognition scheme
- feature values
- texture descriptors
- pattern recognition
- noisy environments
- speech recognition systems
- logic circuits
- edge detector
- signal processing
- cmos technology
- image quality assessment
- multiscale
- real time
- image sequences
- image processing