PEAF: A Power-Efficient Architecture for SRAM-Based FPGAs Using Reconfigurable Hard Logic Design in Dark Silicon Era.
Zahra EbrahimiBehnam KhaleghiHossein AsadiPublished in: IEEE Trans. Computers (2017)
Keyphrases
- reconfigurable hardware
- low cost
- power consumption
- hardware design
- hardware implementation
- power reduction
- cmos technology
- architectural design
- hardware software
- design process
- design principles
- field programmable gate array
- chip design
- low power
- application specific integrated circuits
- fpga implementation
- power dissipation
- design methodology
- software architecture
- logic circuits
- design considerations
- embedded systems
- efficient implementation