High-speed low-power Single-Stage latched-comparator with improved gain and kickback noise rejection.
Sarang KazeminiaMorteza MousazadehKhayrollah HadidiAbdollah KhoeiPublished in: APCCAS (2010)
Keyphrases
- low power
- high speed
- single stage
- multistage
- low cost
- inventory systems
- power consumption
- single chip
- low power consumption
- vlsi architecture
- stochastic optimization
- cmos technology
- image sensor
- noise model
- lead time
- vlsi circuits
- logic circuits
- gate array
- mixed signal
- real time
- max min
- signal processing
- special case
- reinforcement learning