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A Design for a Low-Power Digital Matched Filter Applicable to W-CDMA.
Shoji Goto
Takashi Yamada
Norihisa Takayarna
Yoshifumi Matsushita
Yasoo Harada
Hiroto Yasuura
Published in:
DSD (2002)
Keyphrases
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low power
mixed signal
single chip
power consumption
low cost
high speed
low power consumption
logic circuits
matched filter
multi channel
circuit design
gate array
ultra low power
signal processing
power dissipation