Design of Packet Classification Co-processor with FPGA.
Tian-Xin YanYong-Gang WangPublished in: ESA (2005)
Keyphrases
- single chip
- high speed
- pattern recognition
- gate array
- classification accuracy
- hardware design
- case study
- design process
- support vector machine svm
- low power
- classification algorithm
- signal processing
- low cost
- fpga device
- logic circuits
- functional verification
- image classification
- text classification
- machine learning
- feature space
- support vector
- image processing
- feature selection