MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation.
Paolo MeloniFrancesca PalumboClaudio RubattuGiuseppe TuveriDanilo PaniLuigi RaffoPublished in: Microprocess. Microsystems (2016)
Keyphrases
- low power
- vlsi architecture
- low cost
- signal processor
- high speed
- real time
- power consumption
- signal processing
- low power consumption
- cmos technology
- single chip
- vlsi implementation
- high power
- logic circuits
- digital signal processing
- low density parity check
- low complexity
- ultra low power
- power reduction
- vlsi circuits
- high definition television
- gate array
- wireless transmission
- delay insensitive
- ldpc codes
- video sequences