Optimal design method for chip-area-efficient CMOS low-dropout regulator.

Sho Ikeda Hiroyuki Ito Noboru Ishihara Kazuya Masu

Published in: APCCAS (2012)

Keyphrases

optimal design
high precision
experimental evaluation
cost function
high speed
detection method
neural network
preprocessing
computational cost
high efficiency
feature selection
computational complexity
significant improvement
dynamic programming
low cost
low power