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HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips.

Abdullah Giray YaglikçiAtaberk OlgunMinesh PatelHaocong LuoHasan HassanLois OrosaOguz ErginOnur Mutlu
Published in: CoRR (2022)
Keyphrases
  • high density
  • high speed
  • main memory
  • information processing
  • low voltage
  • hidden information
  • response time
  • prefetching
  • low latency