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Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90 nm CMOS ASICs.

Ciaran J. BrennanShunhua ChangMin WooKiran V. ChattyRobert Gauthier
Published in: Microelectron. Reliab. (2007)
Keyphrases
  • circuit design
  • cmos technology
  • high speed
  • low power
  • image sequences
  • computer simulation
  • positive and negative
  • delay insensitive
  • transmission line
  • power supply
  • physical design