Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology.
Daisuke MiyashitaShouhei KousaiTomoya SuzukiJun DeguchiPublished in: A-SSCC (2016)
Keyphrases
- cmos technology
- deep learning
- neural network
- low power
- power consumption
- low voltage
- unsupervised learning
- parallel processing
- mixed signal
- power dissipation
- machine learning
- high speed
- mental models
- single chip
- pattern recognition
- low cost
- weakly supervised
- image sensor
- cmos image sensor
- network on chip
- back propagation
- real time
- multiscale
- higher order