A low-power high-speed 32/33 prescaler based on novel divide-by-4/5 unit with improved true single-phase clock logic.
Song JiaShilin YanYuan WangGanggang ZhangPublished in: ISCAS (2015)
Keyphrases
- low power
- high speed
- single phase
- logic circuits
- power consumption
- delay insensitive
- single chip
- high power
- input output
- wireless transmission
- power supply
- low cost
- gate array
- digital signal processing
- cmos technology
- control algorithm
- low power consumption
- real time
- control method
- ultra low power
- nm technology
- power reduction
- image processing