Low-power test in compression-based reconfigurable scan architectures.
Sobeeh AlmukhaizimMohammad Gh. MohammadMohammad KhajahPublished in: SBCCI (2010)
Keyphrases
- low power
- low cost
- power consumption
- high speed
- power reduction
- wireless transmission
- high power
- single chip
- vlsi circuits
- low power consumption
- hardware and software
- digital signal processing
- logic circuits
- compression algorithm
- image compression
- general purpose
- real time
- image sensor
- compression ratio
- embedded systems
- cmos technology
- vlsi architecture
- mixed signal
- delay insensitive