A CMOS Microelectrode Array System With Reconfigurable Sub-Array Multiplexing Architecture Integrating 24,320 Electrodes and 380 Readout Channels.
Ji-Hyoung ChaJee-Ho ParkYongjae ParkHyogeun ShinKyeong Seob HwangIl-Joo ChoSeong-Jin KimPublished in: IEEE Trans. Biomed. Circuits Syst. (2022)
Keyphrases
- systolic array
- low cost
- linear array
- analog vlsi
- focal plane
- management system
- image sensor
- high speed
- design considerations
- programmable logic
- random access memory
- real time
- processor array
- reconfigurable architecture
- hardware implementation
- data flow
- imaging systems
- low power
- parallel architecture
- parallel algorithm
- general purpose
- charge coupled device