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An 18-Mb, 12.3-GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin.

Cangsang ZhaoUddalak BhattacharyaMartin DenhamJim KolousekYi LuYong-Gee NgNovat NintunzeKamal SarkezHemmige D. Varadarajan
Published in: IEEE J. Solid State Circuits (1999)
Keyphrases
  • high speed
  • power consumption
  • low power
  • low cost
  • response time
  • focal plane