An Error-Detecting Binary Adder: A Hardware-Shared Implementation.
Terry G. GaddessPublished in: IEEE Trans. Computers (1970)
Keyphrases
- graphics cards
- low cost
- hardware architecture
- error rate
- hardware design
- circuit design
- general purpose
- automatic detection
- vlsi implementation
- hardware and software
- hardware implementation
- error analysis
- high level language
- efficient implementation
- error detection
- field programmable gate array
- computer architecture
- real time
- signal processing
- real time embedded
- data sets