A novel architecture scheme with adaptive pipeline coupling technique for DSP processor design.
Zheng TangJing XieZhigang MaoPublished in: ASICON (2013)
Keyphrases
- parallel architecture
- systolic array
- high speed
- software architecture
- design goals
- case study
- architectural design
- hardware design
- design methodology
- vlsi implementation
- real time
- design considerations
- distributed architecture
- core components
- conceptual model
- multi core processors
- instruction set
- user interface
- vlsi architecture
- multi processor
- memory hierarchy
- fpga device