Non-Sequential Instruction Cache Prefetching for Multiple-Issue Processors.
Alexander V. VeidenbaumQingbo ZhaoAbduhl ShameerPublished in: Int. J. High Speed Comput. (1999)
Keyphrases
- prefetching
- cache misses
- response time
- hit rate
- access patterns
- cache replacement
- web caching
- user perceived latency
- caching scheme
- access latency
- web documents
- web prefetching
- multiprocessor systems
- hit ratio
- web logs
- memory hierarchy
- memory access
- multithreading
- web page prediction
- proxy cache
- replacement policy
- instruction set
- web usage mining
- parallel processing
- hardware implementation
- cache replacement algorithm