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Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation.
Nursultan Kabylkas
Tommy Thorn
Shreesha Srinath
Polychronis Xekalakis
Jose Renau
Published in:
MICRO (2021)
Keyphrases
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asynchronous circuits
simulation environment
verification method
neural network
high speed
logic programming
simulation model
face verification
predicate logic
chip design