High-speed VLSI arithmetic processor architectures using hybrid number representation.

Hosahalli R. Srinivas Keshab K. Parhi

Published in: J. VLSI Signal Process. (1992)

Keyphrases

high speed
small number
signal processing
low power
information systems
fixed number
maximum number
data sets
information retrieval
web services
memory requirements
parallel processing
single chip
arithmetic operations