A System-Level Transprecision FPGA Accelerator for BLSTM Using On-chip Memory Reshaping.
Dionysios DiamantopoulosChristoph HagleitnerPublished in: FPT (2018)
Keyphrases
- high speed
- low cost
- field programmable gate array
- digital signal processors
- single chip
- compute intensive
- low power consumption
- image processing
- programmable logic
- high density
- hardware implementation
- memory requirements
- real time
- parallel implementation
- memory usage
- low power
- memory access
- higher level
- random access memory
- analog vlsi
- signal processing
- systolic array